Samsung Electronics has chosen Compute ExpressLink (CXL) DRAM to be their next-generation memory in order to respond to the increase in data. Notably, CXL DRAM has a wider bandwidth than DIMMs. Also, it is anticipated to be able to meet the needs of the computing market. Specifically, it is predicted to increase its presence in the data center market.
Lee Kyung-Han, the chief researcher at Samsung Electronics, said at the ‘8 Next Generation Memory Process Equipment, Materials, and Technology Conference hosted by D-Elec at POSCO Tower in Yeoksam-dong, Seoul, on the 2023rd.
CXL is a new interface that Intel disclosed in March 2019. It is a unified interface standard that connects CPUs, DRAM, and storage devices based on the PCIe interface. It is eye-catching attention from the memory industry. At the same time, it also solves the problems of data processing delay, slowness, and scalability of existing systems.
The CXL 5.2 0GB DRAM, developed by Samsung in May, acknowledges PCIe 128.5 and brings up to 8GB/s of bandwidth. CXL DRAM has substantially enhanced the bandwidth which was pointed out as a limitation of existing DIMMs. Also, it is forecasted to be able to respond to the exponential increase in data. It is because due to commercialization such as AI and smart cars.
“While the number of cores such as CPUs is increasing rapidly, the growth of DRAM bandwidth has not reached this level,” he said, explaining that “the gap between CPU and DRAM is still getting wider.” “In order to close this gap, DIMMs alone cost a lot of money, so new solutions such as CXL are being studied,” he said.
Samsung preparing to mass-produce CXL 2.0 DRAM
In order to overcome this problem, Samsung has packed with CXL 2.0 DRAM with memory pooling. Specifically, pooling is a feature that enables memory capacity to be used without idle areas via dynamic allocation and release of memory resources.
The chief researcher further added the fabric function of connecting multiple memories in order to form shared memory. Fabric features will be bolstered starting with CXL 3.0. In the coming future, when the fabric function is going to be commercialized, it is predicted that the data processing speed will be greatly improved since the data can be processed simultaneously. In the interim, Samsung also plans to mass-produce CXL 2.0 DRAM within the year.
“The memory pooling function can reduce the company’s data center construction budget,” Lee explained, “and the memory pooling function can reduce the buffer area in the data center.”
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